Monday, August 12, 2013

Published 6:42 AM by

Samsung introduced 3D NAND chips

Samsung introduced 3D NAND chips


Samsung Electronics today announced the start of mass production of memory chips, created on the basis of "layered" technology and providing a multi-level placement of memory on a single physical chip. On the basis of these chips in the near future it is planned to create a new generation of NAND-memory with increased capacity and performance. At Samsung say that the current "flat" memory chips the company will continue to mark as a NAND, while the new items will be called 3D-NAND or V-NAND ( Vertical NAND). It is expected that the first thing the new chips will be used in the SSD-drives and built-in memory. They will be released in capacities from 128 GB to 1 TB, depending on the specific device. Today's 2D-chip NAND-memory technology available with standard 10-19 nm, while the 3D-NAND until released on 25-nm process, but at the expense of Puff placement of cells, these chips can be placed in 2-3 times more data than the "flat" chips. Moreover, 3D-NAND has twice as long a stock of failures, as well as 10 times faster data read.

The company said that the Samsung 3D NAND technology allows for a reduction of the physical size of the chip, and improve its performance. In a statement, Samsung said that 3D NAND will be used in a very wide range of electronics products such as consumer and enterprise-level, such as SSD-drives the corporate level. At the heart of the new memory chip technology is 3D Charge Trap Flash (CTF), as well as the creation of vertical interconnects that can achieve three-dimensional structure of the microchip. According to the company, the new chips can be placed on a given diameter to 24 "stories" of memory cells. In the future, the company plans to increase this figure to 32, then to 64 and so on.

The current 25-nanometer three-dimensional modules are about twice as compact an advanced 20-nanometer modules. At Samsung say that the three-dimensionality of the system allows you to not go down to a very small transistors molecular level, which is difficult to work, and on the other hand, it allows you to keep the physical size of the microchip at a given level what is also important. Of course, 3D-chips also have physical limits, but they are unlikely to be achieved in the next 10 years. itself lithography of three-dimensional chip design is similar to the design of chips with standard 50 - or 40-nm, but here we use the thin insulators for creating high-rise chips. The Samsung said they were working on new chips for about 10 years.
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